概要
給与
応相談
業界
半導體製造業, 被動電子元件製造業, 光電材料・元件製造業, 其他
仕事内容
【Role Description】
Join us to lead the revolution in circuit engineering. Ideal for those who are eager to grow a future together, tackling complex challenges, pioneer cutting-edge solutions for next-gen circuit.
Junior and fresh graduates are also encouraged to apply. This is an excellent opportunity for early- career engineers to grow under the mentorship of experienced professionals.
【Junior Key Responsibilities】
•Design and implement high speed interfaces and complex mixed-signal circuits using cutting-edge CMOS tech and EDA tools.
•Design block IO blocks such as compensation circuit, reference voltage, transmitters and receivers.
•Sub blocks include and not confined to, high speed serializers and deserializers, high speed levelshifters , predrivers , drivers , Feed Forward Equalization, DFE, CTLE.
•Block to pass rigorous quality and reliability like EM-IR , Aging, Overstress
•Run initial SI analysis and IBIS/IBIS-AMI creations
•Timing closure using Prime-Time or equivalent methods
•Work on serial and parallel interfaces.
•Work closely with mask designers to deliver the physical design and assist with silicon evaluation.
【Senior Key Responsibilities】
•Design and implement high speed interfaces and complex mixed-signal circuits using cutting-edge CMOS tech and EDA tools.
•Design block IO blocks such as compensation circuit, reference voltage, transmitters and receivers.
•Sub blocks include and not confined to , high speed serializers and deserializers, high speed levelshifters , predrivers , drivers , Feed Forward Equalization , DFE , CTLE.
•Block to pass rigorous quality and reliability like EM-IR , Aging , Overstress
•Run initial SI analysis and IBIS/IBIS-AMI creations.
•Timing closure using Prime-Time or equivalent methods.
•Work on serial and parallel interfaces.
•Work closely with mask designers to deliver the physical design and assist with silicon evaluation.
•Perform architecture studies, circuit designs & simulations, floor-planning, instructing mask designers, reliability verifications and silicon bring-up.
求めている人材
応募条件
【Junior 必須條件】※歡迎新鮮人
•Degree/Master/PHD in Electrical and Electronics.
•Have knowledge in circuit design using FinFet tech and EDA tools.
•Final year thesis related to circuit design
•Have done subjects/projects related to circuit
•Have understanding in transistor operations.
•Able to work closely with Mask/Layout designers to enable physical design.
【Senior 必須條件】
•Degree/Master/PHD in Electrical and Electronics.
•Minimum 5-10 years of professional working experience in IO circuit design.
•Proficient in circuit design using FinFet tech and EDA tools.
•Experienced in IO circuits not limited to DDR4/5/6 , HBM3/4, LPDDR4/5X, UCIE, MIPI, LVDS
•Worked in serial and or parallel interfaces.
•Have understanding in transistor operations.
•Able to work closely with Mask/Layout designers to enable physical design.
•Skilled in teamwork and mentorship.
•Architecture involvement for senior role英語
B/初級商業程度
その他言語
-
その他
福利厚生
【法定項目】
・依照馬來西亞當地法定制度
【公司福利】
・年假:14天起
・病假:14天起
・醫療保險
・牙科/眼科補助:每年 RM500
・門診補助:每年 RM1,000
・績效獎金
・年度調薪雇用形態
全職
就業時間
8:30 ~ 17:30
休日
週休二日
職種
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